2019
A High-Performance Neuron for Artificial Neural Network based on Izhikevich model Proceedings Article
In: 2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 29–34, IEEE 2019.
2017
Systolic Binary Counter using a Cellular Automaton-based Prescaler Proceedings Article
In: Proceedings of the 21st Pan-Hellenic Conference on Informatics, pp. 1–4, 2017.
2010
Exploration of 2D Cellular Automata as Binary Sequence Generators Proceedings Article
In: 2010 IEEE Computer Society Annual Symposium on VLSI, pp. 41-45, 2010.
2006
A novel high-throughput implementation of a partially unrolled SHA-512 Proceedings Article
In: MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference, pp. 61-65, 2006.
2005
High-Speed FPGA Implementation of the SHA-1 Hash Function Proceedings Article
In: 2005 IEEE Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, pp. 211-215, 2005.
A High-Performance Neuron for Artificial Neural Network based on Izhikevich model Proceedings Article
In: 2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 29–34, IEEE 2019.
Systolic Binary Counter using a Cellular Automaton-based Prescaler Proceedings Article
In: Proceedings of the 21st Pan-Hellenic Conference on Informatics, pp. 1–4, 2017.
Exploration of 2D Cellular Automata as Binary Sequence Generators Proceedings Article
In: 2010 IEEE Computer Society Annual Symposium on VLSI, pp. 41-45, 2010.
A novel high-throughput implementation of a partially unrolled SHA-512 Proceedings Article
In: MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference, pp. 61-65, 2006.
High-Speed FPGA Implementation of the SHA-1 Hash Function Proceedings Article
In: 2005 IEEE Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, pp. 211-215, 2005.
