pub test 1

@inproceedings{gkogkidis2019exploration,

title = {Exploration Study on Configurable Instruction Set for Bioinformatics' Applications},

author = {Anargyros Gkogkidis and Athanasios Kakarountas},

year  = {2019},

date = {2019-01-01},

booktitle = {2019 Panhellenic Conference on Electronics & Telecommunications (PACET)},

pages = {1--6},

organization = {IEEE},

keywords = {Bioinformatics, Computer Architecture, Hardware Accelerator},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{sapounaki2019high,

title = {A High-Performance Neuron for Artificial Neural Network based on Izhikevich model},

author = {Maria Sapounaki and Athanasios Kakarountas},

year  = {2019},

date = {2019-01-01},

booktitle = {2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)},

pages = {29--34},

organization = {IEEE},

keywords = {Digital Circuits, FPGA, Hardware Accelerator},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{chioktour2017systolicb,

title = {Systolic Binary Counter using a Cellular Automaton-based Prescaler},

author = {Vasileios Chioktour and Georgios Spathoulas and Athanasios Kakarountas},

year  = {2017},

date = {2017-01-01},

booktitle = {Proceedings of the 21st Pan-Hellenic Conference on Informatics},

pages = {1--4},

keywords = {Digital Circuits, FPGA, Hardware Accelerator},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{tsakoulis2016performance,

title = {A performance enhancement approach based on tweak process scheduling for a P1619 core},

author = {Thanasis Tsakoulis and George Theodoridis and Athanasios Kakarountas},

year  = {2016},

date = {2016-01-01},

booktitle = {2016 5th International Conference on Modern Circuits and Systems Technologies (MOCAST)},

pages = {1--4},

organization = {IEEE},

keywords = {Data, Hardware Accelerator, security},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{christakis2016high,

title = {High speed binary counter based on 1d cellular automata},

author = {Christoforos Christakis and George Theodoridis and Athanasios Kakarountas},

year  = {2016},

date = {2016-01-01},

booktitle = {2016 5th International Conference on Modern Circuits and Systems Technologies (MOCAST)},

pages = {1--4},

organization = {IEEE},

keywords = {Digital Circuit, Hardware Accelerator},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{7181881,

title = {A compact design of SEED block cipher},

author = {F Pirpilidis and P Kitsos and A Kakarountas},

doi = {10.1109/MECO.2015.7181881},

year  = {2015},

date = {2015-01-01},

booktitle = {2015 4th Mediterranean Conference on Embedded Computing (MECO)},

pages = {119-123},

keywords = {FPGA, Hardware Accelerator},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{gkogkidis2019exploration,

title = {Exploration Study on Configurable Instruction Set for Bioinformatics' Applications},

author = {Anargyros Gkogkidis and Athanasios Kakarountas},

year  = {2019},

date = {2019-01-01},

booktitle = {2019 Panhellenic Conference on Electronics & Telecommunications (PACET)},

pages = {1--6},

organization = {IEEE},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{sapounaki2019high,

title = {A High-Performance Neuron for Artificial Neural Network based on Izhikevich model},

author = {Maria Sapounaki and Athanasios Kakarountas},

year  = {2019},

date = {2019-01-01},

booktitle = {2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)},

pages = {29--34},

organization = {IEEE},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{chioktour2017systolicb,

title = {Systolic Binary Counter using a Cellular Automaton-based Prescaler},

author = {Vasileios Chioktour and Georgios Spathoulas and Athanasios Kakarountas},

year  = {2017},

date = {2017-01-01},

booktitle = {Proceedings of the 21st Pan-Hellenic Conference on Informatics},

pages = {1--4},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{tsakoulis2016performance,

title = {A performance enhancement approach based on tweak process scheduling for a P1619 core},

author = {Thanasis Tsakoulis and George Theodoridis and Athanasios Kakarountas},

year  = {2016},

date = {2016-01-01},

booktitle = {2016 5th International Conference on Modern Circuits and Systems Technologies (MOCAST)},

pages = {1--4},

organization = {IEEE},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{christakis2016high,

title = {High speed binary counter based on 1d cellular automata},

author = {Christoforos Christakis and George Theodoridis and Athanasios Kakarountas},

year  = {2016},

date = {2016-01-01},

booktitle = {2016 5th International Conference on Modern Circuits and Systems Technologies (MOCAST)},

pages = {1--4},

organization = {IEEE},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{7181881,

title = {A compact design of SEED block cipher},

author = {F Pirpilidis and P Kitsos and A Kakarountas},

doi = {10.1109/MECO.2015.7181881},

year  = {2015},

date = {2015-01-01},

booktitle = {2015 4th Mediterranean Conference on Embedded Computing (MECO)},

pages = {119-123},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{5722628,

title = {Exploration and enhancement of P1619-based crypto-cores for efficient performance},

author = {E Hatzidimitriou and A P Kakarountas and A Milidonis},

doi = {10.1109/ICCE.2011.5722628},

year  = {2011},

date = {2011-01-01},

booktitle = {2011 IEEE International Conference on Consumer Electronics (ICCE)},

pages = {361-362},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{5410842,

title = {Elliptic Curve Point Multiplication in GF(2n) using Polynomial Residue Arithmetic},

author = {D Schinianakis and A Kakarountas and T Stouraitis and A Skavantzos},

doi = {10.1109/ICECS.2009.5410842},

year  = {2009},

date = {2009-01-01},

booktitle = {2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)},

pages = {980-983},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{4416827,

title = {Implementation of HSSec: a High–Speed Cryptographic Co-Processor},

author = {A P Kakarountas and H Michail and C E Goutis and C Efstathiou},

doi = {10.1109/EFTA.2007.4416827},

year  = {2007},

date = {2007-01-01},

booktitle = {2007 IEEE Conference on Emerging Technologies and Factory Automation (EFTA 2007)},

pages = {625-631},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{4288627,

title = {Throughput Optimization of the Cipher Message Authentication Code},

author = {H E Michail and A P Kakarountas and G Selimis and C E Goutis},

doi = {10.1109/ICDSP.2007.4288627},

year  = {2007},

date = {2007-01-01},

booktitle = {2007 15th International Conference on Digital Signal Processing},

pages = {495-498},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{4263583,

title = {Temporal and System Level Modifications for High Speed VLSI Implementations of Cryptographic Core},

author = {H E Michail and A P Kakarountas and A S Milidonis and G A Panagiotakopoulos and V N Thanasoulis and C E Goutis},

doi = {10.1109/ICECS.2006.379651},

year  = {2006},

date = {2006-01-01},

booktitle = {2006 13th IEEE International Conference on Electronics, Circuits and Systems},

pages = {1180-1183},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{1653036,

title = {A novel high-throughput implementation of a partially unrolled SHA-512},

author = {F Aisopos and K Aisopos and D Schinianakis and H Michail and A P Kakarountas},

doi = {10.1109/MELCON.2006.1653036},

year  = {2006},

date = {2006-01-01},

booktitle = {MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference},

pages = {61-65},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{1465529,

title = {A low-power and high-throughput implementation of the SHA-1 hash function},

author = {H Michail and A P Kakarountas and O Koufopavlou and C E Goutis},

doi = {10.1109/ISCAS.2005.1465529},

year  = {2005},

date = {2005-01-01},

booktitle = {2005 IEEE International Symposium on Circuits and Systems},

pages = {4086-4089 Vol. 4},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{1579849,

title = {A high-throughput area efficient FPGA implementation of AES-128 Encryption},

author = {A Brokalakis and A P Kakarountas and C E Goutis},

doi = {10.1109/SIPS.2005.1579849},

year  = {2005},

date = {2005-01-01},

booktitle = {IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.},

pages = {116-121},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{10.1007/11556930_60,

title = {A low-power and high-throughput implementation of the SHA-1 hash function},

author = {H E Michail and A P Kakarountas and George N Selimis and Costas E Goutis},

editor = {Vassilis Paliouras and Johan Vounckx and Diederik Verkest},

isbn = {978-3-540-32080-7},

year  = {2005},

date = {2005-01-01},

booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation},

pages = {591--600},

publisher = {Springer Berlin Heidelberg},

address = {Berlin, Heidelberg},

abstract = {Hash functions are widely used in applications that call for data integrity and signature authentication at electronic transactions. A hash function is utilized in the security layer of every communication protocol. As time passes more sophisticated applications arise that address to more users-clients and thus demand for higher throughput. Furthermore, due to the tendency of the market to minimize devices' size and increase their autonomy to make them portable, power issues have also to be considered. The existing SHA-1 Hash Function implementations (SHA-1 is common in many protocols e.g. IPSec) limit throughput to a maximum of 2 Gbps. In this paper, a new implementation comes to exceed this limit improving the throughput by 53%. Furthermore,Low-power dissipation is kept low compared to previous works, in such way that the proposed implementation can be characterized as low-power.},

keywords = {},

pubstate = {published},

tppubtype = {inproceedings}

}