pub test 1

@article{myridakis2021power,

title = {A Power Dissipation Monitoring Circuit for Intrusion Detection and Botnet Prevention on IoT Devices},

author = {Dimitrios Myridakis and Paul Myridakis and Athanasios Kakarountas},

year  = {2021},

date = {2021-01-01},

journal = {Computation},

volume = {9},

number = {2},

pages = {19},

publisher = {Multidisciplinary Digital Publishing Institute},

keywords = {Hardware, IoT, security, Smart Devices},

pubstate = {published},

tppubtype = {article}

}

@article{Giannoukos_Kakarountas_Chioktour_2020,

title = {Interaction between two cells based on a recurrent neural network using the impedance concept},

author = {Georgios Giannoukos and Athanasios Kakarountas and Vasileios Chioktour},

doi = {10.3233/JCM-204367},

issn = {14727978, 18758983},

year  = {2020},

date = {2020-07-01},

journal = {Journal of Computational Methods in Sciences and Engineering},

pages = {1–7},

keywords = {Hardware, Neural Networks},

pubstate = {published},

tppubtype = {article}

}

@article{myridakis2020enhancing,

title = {Enhancing Security on IoT Devices via Machine Learning on Conditional Power Dissipation},

author = {Dimitrios Myridakis and Stefanos Papafotikas and Konstantinos Kalovrektis and Athanasios Kakarountas},

year  = {2020},

date = {2020-01-01},

journal = {Electronics},

volume = {9},

number = {11},

pages = {1799},

publisher = {Multidisciplinary Digital Publishing Institute},

keywords = {Hardware, IoT, Machine Learning, security, Smart Devices},

pubstate = {published},

tppubtype = {article}

}

@article{fi12030048,

title = {Smart Devices Security Enhancement via Power Supply Monitoring},

author = {Dimitrios Myridakis and Georgios Spathoulas and Athanasios Kakarountas and Dimitrios Schinianakis},

url = {https://www.mdpi.com/1999-5903/12/3/48},

doi = {10.3390/fi12030048},

issn = {1999-5903},

year  = {2020},

date = {2020-01-01},

journal = {Future Internet},

volume = {12},

number = {3},

abstract = {The continuous growth of the number of Internet of Things (IoT) devices and their inclusion to public and private infrastructures has introduced new applciations to the market and our day-to-day life. At the same time, these devices create a potential threat to personal and public security. This may be easily understood either due to the sensitivity of the collected data, or by our dependability to the devices' operation. Considering that most IoT devices are of low cost and are used for various tasks, such as monitoring people or controlling indoor environmental conditions, the security factor should be enhanced. This paper presents the exploitation of side-channel attack technique for protecting low-cost smart devices in an intuitive way. The work aims to extend the dataset provided to an Intrusion Detection Systems (IDS) in order to achieve a higher accuracy in anomaly detection. Thus, along with typical data provided to an IDS, such as network traffic, transmitted packets, CPU usage, etc., it is proposed to include information regarding the device’s physical state and behaviour such as its power consumption, the supply current, the emitted heat, etc. Awareness of the typical operation of a smart device in terms of operation and functionality may prove valuable, since any deviation may warn of an operational or functional anomaly. In this paper, the deviation (either increase or decrease) of the supply current is exploited for this reason. This work aimed to affect the intrusion detection process of IoT and proposes for consideration new inputs of interest with a collateral interest of study. In parallel, malfunction of the device is also detected, extending this work’s application to issues of reliability and maintainability. The results present 100% attack detection and this is the first time that a low-cost security solution suitable for every type of target devices is presented.},

keywords = {Anomaly Detection, Hardware, IoT, security, smart device; current monitoring; physical characteristics},

pubstate = {published},

tppubtype = {article}

}

@article{myridakis2021power,

title = {A Power Dissipation Monitoring Circuit for Intrusion Detection and Botnet Prevention on IoT Devices},

author = {Dimitrios Myridakis and Paul Myridakis and Athanasios Kakarountas},

year  = {2021},

date = {2021-01-01},

journal = {Computation},

volume = {9},

number = {2},

pages = {19},

publisher = {Multidisciplinary Digital Publishing Institute},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{Giannoukos_Kakarountas_Chioktour_2020,

title = {Interaction between two cells based on a recurrent neural network using the impedance concept},

author = {Georgios Giannoukos and Athanasios Kakarountas and Vasileios Chioktour},

doi = {10.3233/JCM-204367},

issn = {14727978, 18758983},

year  = {2020},

date = {2020-07-01},

journal = {Journal of Computational Methods in Sciences and Engineering},

pages = {1–7},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{myridakis2020enhancing,

title = {Enhancing Security on IoT Devices via Machine Learning on Conditional Power Dissipation},

author = {Dimitrios Myridakis and Stefanos Papafotikas and Konstantinos Kalovrektis and Athanasios Kakarountas},

year  = {2020},

date = {2020-01-01},

journal = {Electronics},

volume = {9},

number = {11},

pages = {1799},

publisher = {Multidisciplinary Digital Publishing Institute},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{fi12030048,

title = {Smart Devices Security Enhancement via Power Supply Monitoring},

author = {Dimitrios Myridakis and Georgios Spathoulas and Athanasios Kakarountas and Dimitrios Schinianakis},

url = {https://www.mdpi.com/1999-5903/12/3/48},

doi = {10.3390/fi12030048},

issn = {1999-5903},

year  = {2020},

date = {2020-01-01},

journal = {Future Internet},

volume = {12},

number = {3},

abstract = {The continuous growth of the number of Internet of Things (IoT) devices and their inclusion to public and private infrastructures has introduced new applciations to the market and our day-to-day life. At the same time, these devices create a potential threat to personal and public security. This may be easily understood either due to the sensitivity of the collected data, or by our dependability to the devices' operation. Considering that most IoT devices are of low cost and are used for various tasks, such as monitoring people or controlling indoor environmental conditions, the security factor should be enhanced. This paper presents the exploitation of side-channel attack technique for protecting low-cost smart devices in an intuitive way. The work aims to extend the dataset provided to an Intrusion Detection Systems (IDS) in order to achieve a higher accuracy in anomaly detection. Thus, along with typical data provided to an IDS, such as network traffic, transmitted packets, CPU usage, etc., it is proposed to include information regarding the device’s physical state and behaviour such as its power consumption, the supply current, the emitted heat, etc. Awareness of the typical operation of a smart device in terms of operation and functionality may prove valuable, since any deviation may warn of an operational or functional anomaly. In this paper, the deviation (either increase or decrease) of the supply current is exploited for this reason. This work aimed to affect the intrusion detection process of IoT and proposes for consideration new inputs of interest with a collateral interest of study. In parallel, malfunction of the device is also detected, extending this work’s application to issues of reliability and maintainability. The results present 100% attack detection and this is the first time that a low-cost security solution suitable for every type of target devices is presented.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{doi:10.1142/S0218126611007189,

title = {Cipher Block based Authentication Module: A Hardware Design Perspective},

author = {HARRIS E MICHAIL and DIMITRIOS SCHINIANAKIS and COSTAS E GOUTIS and ATHANASIOS P KAKAROUNTAS and GEORGIOS SELIMIS},

url = {https://doi.org/10.1142/S0218126611007189},

doi = {10.1142/S0218126611007189},

year  = {2011},

date = {2011-01-01},

journal = {Journal of Circuits, Systems and Computers},

volume = {20},

number = {02},

pages = {163-184},

abstract = {Message Authentication Codes (MACs) are widely used in order to authenticate data packets, which are transmitted thought networks. Typically MACs are implemented using modules like hash functions and in conjunction with encryption algorithms (like Block Ciphers), which are used to encrypt the transmitted data. However NIST in May 2005 issued a standard, addressing certain applications and their needs, defining a way to implement MACs through FIPS-approved and secure block cipher algorithms. In this paper the best performing implementation of the CMAC standard is presented, in terms of throughput, along with an efficient AES design and implementation.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{epitropakis2010hardware,

title = {Hardware-friendly higher-order neural network training using distributed evolutionary algorithms},

author = {Michael G Epitropakis and Vassilis P Plagianakos and Michael N Vrahatis},

year  = {2010},

date = {2010-01-01},

journal = {Applied Soft Computing},

volume = {10},

number = {2},

pages = {398--408},

publisher = {Elsevier},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{epitropakis2010hardwareb,

title = {Hardware-friendly higher-order neural network training using distributed evolutionary algorithms},

author = {Michael G Epitropakis and Vassilis P Plagianakos and Michael N Vrahatis},

year  = {2010},

date = {2010-01-01},

journal = {Applied Soft Computing},

volume = {10},

number = {2},

pages = {398--408},

publisher = {Elsevier},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{articleb,

title = {Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy},

author = {Athanasios Milidonis and Nikolaos Alachiotis and Vasileios Porpodas and Harris Michail and George Panagiotakopoulos and Athanasios Kakarountas and Costas Goutis},

doi = {10.1007/s11265-009-0393-9},

year  = {2010},

date = {2010-01-01},

journal = {Journal of Signal Processing Systems},

volume = {59},

pages = {281-296},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{4663678b,

title = {An RNS Implementation of an $F_p$ Elliptic Curve Point Multiplier},

author = {D M Schinianakis and A P Fournaris and H E Michail and A P Kakarountas and T Stouraitis},

doi = {10.1109/TCSI.2008.2008507},

year  = {2009},

date = {2009-01-01},

journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},

volume = {56},

number = {6},

pages = {1202-1213},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{GALANIS2006554,

title = {A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems},

author = {Michalis D Galanis and Athanassios Milidonis and Athanassios P Kakarountas and Costas E Goutis},

url = {https://www.sciencedirect.com/science/article/pii/S0026269205003538},

doi = {https://doi.org/10.1016/j.mejo.2005.09.032},

issn = {0026-2692},

year  = {2006},

date = {2006-01-01},

journal = {Microelectronics Journal},

volume = {37},

number = {6},

pages = {554-564},

abstract = {In this paper, we propose a method for speeding-up Digital Signal Processing applications by partitioning them between the reconfigurable hardware blocks of different granularity and mapping critical parts of applications on coarse-grain reconfigurable hardware. The reconfigurable hardware blocks are embedded in a heterogeneous reconfigurable system architecture. The fine-grain part is implemented by an embedded FPGA unit, while for the coarse-grain reconfigurable hardware our developed high-performance coarse-grain data-path is used. The design flow mainly consists of three steps; the analysis procedure, the mapping onto coarse-grain blocks, and the mapping onto the fine-grain hardware. In this work, the methodology is validated using five real-life applications; an OFDM transmitter, a medical imaging technique, a wavelet-based image compressor, a video compression scheme and a JPEG encoder. The experimental results show that the speedup, relative to an all-FPGA solution, ranges from 1.55 to 4.17 for the considered applications.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{plagianakos2002parallel,

title = {Parallel evolutionary training algorithms for “hardware-friendly” neural networks},

author = {Vassilis P Plagianakos and Michael N Vrahatis},

year  = {2002},

date = {2002-01-01},

journal = {Natural Computing},

volume = {1},

number = {2},

pages = {307--322},

publisher = {Springer},

keywords = {},

pubstate = {published},

tppubtype = {article}

}